About the role#
As a Signal Integrity / Power Integrity Intern, you will help design and validate high-performance AI systems. You will work with package, PCB, ASIC, and system engineers to analyze high-speed interfaces, extract channel models, and improve signal quality across accelerator platforms. This role involves hands-on experience with PCIe, Ethernet, high-speed SerDes channels, advanced packaging, and multi-board systems.
What you'll do#
- Perform channel analysis for high-speed interfaces including PCIe, Ethernet, and other SerDes links.
- Extract and validate S-parameter models from package and PCB layouts.
- Analyze insertion loss, return loss, impedance discontinuities, and crosstalk.
- Generate channel compliance reports and support design reviews.
- Build and validate 3D electromagnetic models using Ansys HFSS.
- Develop board and package channel models from ECAD design databases.
- Correlate simulation results with measurements and lab data.
- Partner with PCB layout, package, hardware, and ASIC teams to identify root causes of channel degradation and propose design improvements.
What you'll need#
- Progress toward a BS, MS, or PhD in Electrical Engineering, Computer Engineering, or a related field.
- Coursework or project experience in signal integrity, electromagnetics, RF, microwave engineering, or high-speed digital design.
- Familiarity with transmission line theory and S-parameters.
- Understanding of PCB stackups, routing, and high-speed design fundamentals.
- Strong analytical and debugging skills.
- Experience with Ansys HFSS, SIwave, ADS, CST, or similar simulation tools is preferred.
- Familiarity with ECAD databases such as Allegro or APD is a plus.
- Experience with Python scripting for automation and laboratory equipment like VNAs or oscilloscopes is beneficial.
Location & details#
- Location: San Jose, California
- Work Modality: On-site
- Employment Type: Full-time
- Term: Rolling
How to get in at Etched
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