Design Verification Engineer Intern

About the role#

GlobalFoundries is seeking a Design Verification Engineer Intern to join the CPU verification team. You will work on verifying processor components with a focus on CPU core functionality, performance, and modeling. This role offers the opportunity to learn advanced verification methodologies while collaborating with architects and designers.

What you'll do#

• Perform functional verification of CPU cores and related subsystems.
• Interpret microarchitectural specifications to help build verification strategies.
• Develop and execute verification plans, including testbench creation and test case development.
• Write directed and constrained-random test cases using SystemVerilog, C, and Assembly.
• Use UVM-based environments for coverage-driven verification.
• Analyze coverage reports and support the closure of functional and code coverage gaps.
• Automate regression and verification flows with Python, Perl, or Shell.
• Collaborate with engineers to support design quality and performance.
• Perform all tasks safely and follow Environmental, Health, Safety, and Security programs.

What you'll need#

• You are at least a sophomore pursuing a bachelor's degree in Electronics Engineering, Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• You maintain at least a 3.0 GPA and are in good academic standing.
• You are fluent in written and verbal English.
• You can work at least 40 hours per week.
• You have coursework or project experience with SystemVerilog, UVM, or constrained-random verification.
• You are familiar with CPU architectures like RISC-V, ARM, or MIPS.
• You have a basic understanding of cache and coherency concepts.
• You have scripting experience in Python, Perl, or Shell.
• You possess strong analytical, problem-solving, and technical communication skills.
• You are self-motivated and work well in teams.

Preferred qualifications include prior internship experience, leadership experience, project management skills, and an interest in using AI tools to improve productivity. We also value exposure to RISC-V architecture, knowledge of interconnect protocols like AXI, ACE, or CHI, and experience with FPGA prototyping or emulation platforms.

Location & details#

• This is a full-time, paid internship for Summer 2027.
• The role is based on-site in either Richardson, Texas, or Plano, Texas.
• Sponsorship is not available for this position.