About the role#
NVIDIA is looking for a VLSI CAD Timing Intern to work on Applied AI. You will join a team building systems that learn from sign-off data and assist engineers in achieving predictable timing closure. This role involves developing solutions for timing and constraint analysis workflows, including data generation, model training, and agentic automation.
What you'll do#
- Learn and support static timing analysis (STA) flows using industry tools.
- Develop and automate timing, constraints, and quality of results (QoR) validation flows.
- Analyze timing reports, constraints, and design data across various corners and modes.
- Collaborate with CAD, physical design, and methodology engineers on sign-off strategies.
- Contribute to AI or analytics-assisted approaches for flow optimization and constraint checking.
- Investigate how physical effects influence timing and design decisions.
What you'll need#
- Currently pursuing a Master’s or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- Academic knowledge or coursework in VLSI/ASIC design, digital circuits, or computer architecture.
- Exposure to applying agentic AI to back-end VLSI tasks.
- Familiarity with static timing analysis, constraints, or digital design flows.
- Proficiency in scripting or programming, with a preference for Python.
- Ability to work with technical data and reports to solve problems in complex systems.
Location & details#
- Location: Santa Clara, California.
- Term: Summer 2027.
- Modality: On-site.
- This is a paid, full-time internship.
About NVIDIA
NVIDIA operates as a computer hardware manufacturer based in Santa Clara, California. Founded in 1993, the company focuses on accelerated computing and graphics technology. It produces hardware for markets including artificial intelligence, gaming, and data centers. The organization employs over 50,000 people and maintains a global presence.
How to get in at NVIDIA
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