About the role#
This is an on-site internship position based in San Jose, California, within the Cadence DDR IP group. You will focus on post-silicon validation, contributing to the development and testing of advanced semiconductor technology.
What you'll do#
- Validate the system-level and electrical performance of internal silicon test chips.
- Drive system and electrical testing efforts to identify silicon issues.
- Debug silicon issues in close collaboration with analog and digital design teams.
- Deliver high-quality characterization reports.
- Work cross-functionally to ensure product functionality, reliability, and successful deployment.
What you'll need#
- Bachelor's or master's degree in Electrical Engineering.
- 0-2 years of relevant work experience.
- Strong analytical and problem-solving skills.
- Solid fundamentals in analog and digital electronics, RTL, signal integrity, and control systems.
- Experience with script-based test automation in Python, C, or other scripting tools.
- Excellent written and verbal communication skills.
- Ability to work collaboratively in a team environment.
- Prior experience in the hardware semiconductor or electronics industry is considered a plus.
Location & details#
- Location: San Jose, California.
- Modality: On-site.
- Employment: Full-time.
- Compensation: Paid internship.
- Term: Rolling.
Relevant fieldsElectrical Engineering
