About the role#
Rambus is hiring an RTL Digital Design Intern for the Memory Interface Chip team. You will report to the Digital Design Director and work on DDR6 memory interface projects for AI data centers. This role involves collaborating with experienced engineers to develop silicon products.
What you'll do#
- Write Verilog and SystemVerilog RTL for DDR5 and DDR6 memory interface products.
- Design digital control logic, state machines, and register interfaces.
- Optimize RTL designs for power, performance, and area.
- Support timing closure and Static Timing Analysis.
- Build behavioral models for simulation and verification.
- Assist verification and validation teams during silicon bring-up and debug.
What you'll need#
- BS or MS in Electrical Engineering or Computer Engineering.
- Coursework in Digital Integrated Circuits, Advanced VLSI Systems, Advanced Computer Architecture, Embedded Systems, and Design and Analysis of Algorithms.
- Experience with digital RTL design, including LEC, CDC, Lint, DFT, BIST, and STA tools.
- Proficiency in Verilog and SystemVerilog.
- Experience with Python or Perl script development.
- Ability to document design techniques and verification methodologies.
- Strong debugging, analytical, and communication skills.
Location & details#
- Location: Johns Creek, Georgia.
- Work Modality: Hybrid (at least three days per week onsite).
- Employment: Full-time internship.
- Compensation: Paid position.
About Rambus
Rambus develops hardware and software for the semiconductor industry. Founded in 1990 and based in San Jose, the company focuses on memory, interfaces, and security technologies. It provides IP cores, chips, and architecture licenses to chip designers and system manufacturers. The firm employs between 501 and 1,000 people.
How to get in at Rambus
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