About the role#
This is a 16-month co-op internship for students pursuing a degree in Computer Engineering, Electrical Engineering, or a related field. You will join our team in Kanata, Ontario, starting in the summer of 2027. This is a full-time, paid, hybrid position.
What you'll do#
- Work within a UVM (Universal Verification Methodology) testbench to verify SerDes ASIC RTL designs.
- Develop in-depth knowledge of the PCIe protocol and the internal architecture of SerDes ASIC chips.
- Learn and apply Design Verification (DV) concepts, including the Register Abstraction Layer (RAL), UVM phases, objects, drivers, monitors, and scoreboards.
- Perform wave analysis and debug complex designs using Synopsys tools like Verdi.
- Collaborate with senior engineers by participating in design reviews and team discussions.
What you'll need#
- Currently in 3rd or 4th-year standing of a bachelor's degree in Computer Engineering, Electrical Engineering, or a related field.
- Strong foundational knowledge of Object-Oriented Programming (OOP) principles.
- Familiarity with SystemVerilog for hardware design and verification.
- Proficiency in Python for automation and testing tasks.
- Ability to work as a self-starter who picks up new concepts quickly.
- Experience with MATLAB is a plus.
Location & details#
- Location: Kanata, Ontario, Canada.
- Work Modality: Hybrid (2-3 days per week in-office).
- Term: 16-month co-op starting Summer 2027.
About Synopsys Inc
Synopsys Inc is a public company based in Sunnyvale, California. Founded in 1986, the firm provides software development tools and services. It specializes in electronic design automation, semiconductor intellectual property, and software security. The organization employs over 10,000 people.
How to get in at Synopsys Inc
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