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    Digital Physical Design (P&R) Intern

    NXP Semiconductors · Chandler, Arizona, United States

    rollingOn-sitePaidPosted 2026-07-13
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    About the role#

    As a Digital Physical Design (P&R) Intern, you will work alongside a highly experienced team to support backend design processes. This position is a full-time, paid opportunity based in Chandler, Arizona.

    What you'll do#

    • Learn and utilize the existing flow, tools, and scripts for the digital backend process, ranging from Synthesis to GDS2.
    • Support multiple parallel runs to experiment with various RTL implementations and tool configurations.
    • Analyze Cadence tool user manuals and forums to suggest improvements for existing workflows and scripts.
    • Conduct experiments to identify the most area-optimal design solutions.

    What you'll need#

    • Currently pursuing a Master's degree (MSEE) with coursework in Digital Design, RTL, and digital backend flows.
    • Strong problem-solving, communication, planning, and organizational skills.
    • Prior experience with backend design flows is a strong plus.
    • Ability to relocate to the Phoenix Metro area.

    Location & details#

    • Location: Chandler, Arizona.
    • Work Modality: On-site, with a minimum requirement of 3 full days per week in the office.
    • Term: Rolling.
    • Eligibility: Must be authorized to work without company sponsorship.
    Relevant fields:Electrical EngineeringComputer EngineeringComputer Science

    About NXP Semiconductors

    NXP Semiconductors is a public company founded in 2006 that maintains its headquarters in Eindhoven, Noord-Brabant. With a workforce exceeding 10,000 employees, the organization manufactures semiconductors for the automotive, industrial, mobile, and communications infrastructure sectors. Its product portfolio includes microcontrollers, sensors, power management components, and wireless connectivity solutions designed for smart home and city applications.

    All NXP Semiconductors internships

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