About the role#
As a Physical Design Engineer Intern, you will join our physical design team to support the implementation and verification of AI SoC projects. You will work on tasks ranging from netlist to GDSII for our low-power processors.
What you'll do#
- Execute floor-planning and auto place and route tasks.
- Perform static timing analysis and implement ECOs.
- Conduct signal integrity, EM/IR, and formal verification.
- Run physical layout verification, including LVS, DRC, and DFM, at the block or full-chip level.
What you'll need#
- Current enrollment in a Computer Engineering or Electrical Engineering program.
- Technical expertise in physical design.
- Understanding of SoC implementation processes.
Location & details#
- This is a full-time, paid internship based in the United States.
- Work is on-site.
- We do not offer visa sponsorship for this role.
About Ambarella Inc
Ambarella Inc is a semiconductor company based in Santa Clara, California. Founded in 2004, the firm develops low-power systems-on-chip for edge AI applications. Its products support vehicle safety, robotics, and physical security systems. The company employs approximately 788 people and operates as a public entity.
How to get in at Ambarella Inc
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